Spiking Neural FPGA Accelerator for Edge-AI in Wearable Devices

Authors

  • Jelena L. Holovati Department of Lab Medicine and Pathology, University of Alberta, Canada
  • Lau W. Chenga Faculty of Information Science and Technology University, Kebangsaan, Malaysia.

Keywords:

Spiking Neural Networks (SNNs), FPGA Accelerator, Edge AI, Wearable Devices, Low-Power Inference, Event-Driven Computing, Neuromorphic Processing, Leaky Integrate-and-Fire (LIF), Real-Time Health Monitoring, Embedded AI.

Abstract

In this article, a new architecture on Field-Programmable Gate Arrays (FPGAs) is depicted as a hardware accelerator that enables the deployment of Spiking Neural Networks (SNNs) to the edge-AI wearable device. As a third generation of neural models, SNNs make use of biologically plausible spike-based communication that can implement asynchronous, event-driven computation, consuming much less energy than synchronous neural models. This makes them very apt to use in wearable applications that favor continuous sensing, low latency and repeat ultralow-power. Although this is promising, there are limited approaches on SNN deployments on wearable environments with constrained resources by virtue of an absence of designs that support scalable and energy-conscious hardware implementations. With a view to filling the gap, we design and test a modular and configurable SNN accelerator on the Xilinx Artix-7 FPGA that is specifically adapted to embrace Leaky Integrate-and-Fire (LIF) neurons featuring temporal dynamics, and sparse events propagation. Such architecture uses pipelined units to process neurons, fixed-point arithmetic, events-based routing schemes, and are latency-optimized and memory efficient. We test the suggested accelerator with two typical tasks defined such as gesture recognition and classification of ECG with the DVS Gesture dataset and the PhysioNet signal respectively, both being essential in health monitoring and human-computer interaction. Through experiments, we realize that our accelerator can reduce energy consumption and inference latency (by 60 percent and 35 percent, respectively) and improve accuracy when compared to standard CNN-based FPGA accelerators. In addition, the design does fit less than 60 percent of logic resources on the Artix-7 device, which gives the design space to add more sensor interfacing and communication logic, as may be needed in real-life wearable systems. The above results prove that the experiment with the use of neuromorphic computing paradigms on low-cost, battery-powered edges is viable and productive. The idea suggests a remarkable step towards the incorporation of real-time, energy-aware smarts into wearable devices and technology of the future, as well as unfulfilled potential to inform applications which will perform non-stop biomedical surveillance, gesture-based control systems and on-board known anomaly detection in the health and fitness fields.

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Published

2025-03-24

How to Cite

[1]
Jelena L. Holovati and Lau W. Chenga, “Spiking Neural FPGA Accelerator for Edge-AI in Wearable Devices”, ECC SUBMIT, vol. 3, no. 1, pp. 88–95, Mar. 2025.